Please use this identifier to cite or link to this item:
http://hdl.handle.net/20.500.11861/7621
Title: | Designing optimal combinational digital circuits using a multiple logic unit processor |
Authors: | Cheang, Sin Man Lee, Kin Hong Prof. LEUNG Kwong Sak |
Issue Date: | 2004 |
Publisher: | Springer Verlag |
Source: | European Conference on Genetic Programming, 2004, pp. 23 - 34. |
Conference: | European Conference on Genetic Programming |
Abstract: | Genetic Parallel Programming (GPP) is a novel Genetic Programming paradigm. The GPP Accelerating Phenomenon, i.e. parallel programs are easier to be evolved than sequential programs, opens up a new approach to evolve solution programs in parallel forms. Based on the GPP paradigm, we developed a combinational digital circuit learning system, the GPP+MLP system. An optimal Multiple Logic Unit Processor (MLP) is designed to evaluate genetic parallel programs. To show the effectiveness of the proposed GPP+MLP system, four multi-output Binary arithmetic circuits are used. Experimental results show that both the gate counts and the propagation gate delays of the evolved_circuits are less than conventional designs. For example, in a 3-bit multiplier experiment, we obtained a combinational digital circuit with 26 two-input logic gates in 6 gate levels. It utilizes 4 gates less than a conventional design. © Springer-Verlag 2004. |
Type: | Conference Paper |
URI: | http://hdl.handle.net/20.500.11861/7621 |
ISBN: | 978-354021346-8 |
DOI: | 10.1007/978-3-540-24650-3_3 |
Appears in Collections: | Publication |
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