Designing optimal combinational digital circuits using a multiple logic unit processor

Abstract

Genetic Parallel Programming (GPP) is a novel Genetic Programming paradigm. The GPP Accelerating Phenomenon, i.e. parallel programs are easier to be evolved than sequential programs, opens up a new approach to evolve solution programs in parallel forms. Based on the GPP paradigm, we developed a combinational digital circuit learning system, the GPP+MLP system. An optimal Multiple Logic Unit Processor (MLP) is designed to evaluate genetic parallel programs. To show the effectiveness of the proposed GPP+MLP system, four multi-output Binary arithmetic circuits are used. Experimental results show that both the gate counts and the propagation gate delays of the evolved_circuits are less than conventional designs. For example, in a 3-bit multiplier experiment, we obtained a combinational digital circuit with 26 two-input logic gates in 6 gate levels. It utilizes 4 gates less than a conventional design. © Springer-Verlag 2004.