Please use this identifier to cite or link to this item:
http://hdl.handle.net/20.500.11861/7678
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Li, Yuan Yuan | en_US |
dc.contributor.author | Cheung S.K. | en_US |
dc.contributor.author | Prof. LEUNG Kwong Sak | en_US |
dc.contributor.author | Wong C.K. | en_US |
dc.date.accessioned | 2023-03-30T03:51:28Z | - |
dc.date.available | 2023-03-30T03:51:28Z | - |
dc.date.issued | 1998 | - |
dc.identifier.citation | IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, 1998, vol. 45 (5), pp. 563 - 574 | en_US |
dc.identifier.issn | 10577130 | - |
dc.identifier.uri | http://hdl.handle.net/20.500.11861/7678 | - |
dc.description.abstract | We consider Steiner minimal trees (SMT's) in metrics defined by given orientations. The problem is motivated by wiring considerations of VLSI chips when the wiring direction is not restricted to only horizontal and vertical. In particular, we concentrate on the case when the given orientations form angles of 0°, 60°, and 120° (As-metric) since many interesting results can be obtained which may shed light on other metrics in the family. Specifically, we show that any SMT can be transformed to one with their Steiner points located on the grid points of a multilevel grid, where the number of levels can be quite small. Based on this result, we have developed a simulated annealing-based algorithm to generate near-optimal SMT's. Empirical results and comparisons with Euclidean cases are also given. © 1998 IEEE. | en_US |
dc.language.iso | en | en_US |
dc.relation.ispartof | IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing | en_US |
dc.title | Steiner tree constructions in λ3-metric | en_US |
dc.type | Peer Reviewed Journal Article | en_US |
dc.identifier.doi | 10.1109/82.673638 | - |
item.fulltext | No Fulltext | - |
crisitem.author.dept | Department of Applied Data Science | - |
Appears in Collections: | Applied Data Science - Publication |
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