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The implementation of a PC-based list processor for symbolic computation
Author(s)
Date Issued
1990
Publisher
Publ by IEEE
ISBN
0879425563
Citation
No source title available, 1990, pp. 713 - 717
Type
Conference Proceedings
Abstract
The authors present the design and the evaluation results of the arithmetical and symbolical list processor (ASLP), a purpose-built processor for list handling and processing. Multiple buses and multiple memory principles are applied for pipelining and parallel data movements. This microprogrammable ASLP is a stand-along processor which connects to an IBM/AT personal computer. The IBM/AT personal computer works as the host for software development. The prototype of the ASLP is constructed using standard chips. A special micro-assembler is written for the ASLP micro-assembly program translation. Most standard list functions are programmed and evaluated. In parallel with the evaluation, the core part of the original hardware design of the ASLP is being redesigned using ASICs.
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