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http://hdl.handle.net/20.500.11861/7568
Title: | Applying genetic parallel programming to synthesize combinational logic circuits |
Authors: | Cheang, Sin Man Lee, Kin Hong Prof. LEUNG Kwong Sak |
Issue Date: | 2007 |
Source: | IEEE Transactions on Evolutionary Computation, 2007, vol. 11 (4) , pp. 503 - 520 |
Journal: | IEEE Transactions on Evolutionary Computation |
Abstract: | Experimental results show that parallel programs can be evolved more easily than sequential programs in genetic parallel programming (GPP). GPP is a novel genetic programming paradigm which evolves parallel program solutions. With the rapid development of lookup-table-based (LUT-based) field programmable gate arrays (FPGAs), traditional circuit design and optimization techniques cannot fully exploit the LUTs in LUT-based FPGAs. Based on the GPP paradigm, we have developed a combinational logic circuit learning system, called GPP logic circuit synthesizer (GPPLCS), in which a multilogic-unit processor is used to evaluate LUT circuits. To show the effectiveness of the GPPLCS, we have performed a series of experiments to evolve combinational logic circuits with two- and four-input LUTs. In this paper, we present eleven multi-output Boolean problems and their evolved circuits. The results show that the GPPLCS can evolve more compact four-input LUT circuits than the well-known LUT-based FPGA synthesis algorithms. © 2006 IEEE. |
Type: | Peer Reviewed Journal Article |
URI: | http://hdl.handle.net/20.500.11861/7568 |
ISSN: | 1089778X |
DOI: | 10.1109/TEVC.2006.884044 |
Appears in Collections: | Publication |
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