Cheang, Sin ManSin ManCheangLee, Kin HongKin HongLeeProf. LEUNG Kwong Sak2023-03-242023-03-242007IEEE Transactions on Evolutionary Computation, 2007, vol. 11 (4) , pp. 503 - 5201089778Xhttp://hdl.handle.net/20.500.11861/7568Experimental results show that parallel programs can be evolved more easily than sequential programs in genetic parallel programming (GPP). GPP is a novel genetic programming paradigm which evolves parallel program solutions. With the rapid development of lookup-table-based (LUT-based) field programmable gate arrays (FPGAs), traditional circuit design and optimization techniques cannot fully exploit the LUTs in LUT-based FPGAs. Based on the GPP paradigm, we have developed a combinational logic circuit learning system, called GPP logic circuit synthesizer (GPPLCS), in which a multilogic-unit processor is used to evaluate LUT circuits. To show the effectiveness of the GPPLCS, we have performed a series of experiments to evolve combinational logic circuits with two- and four-input LUTs. In this paper, we present eleven multi-output Boolean problems and their evolved circuits. The results show that the GPPLCS can evolve more compact four-input LUT circuits than the well-known LUT-based FPGA synthesis algorithms. © 2006 IEEE.enGene Regulatory NetworksParallelizationCombinational CircuitsCombinational Logic CircuitsCircuit DesignProgramming ParadigmFitness FunctionDesign StageEvolvabilityTwo-Stage ApproachConventional DesignEvolutionary ComputationOptimization StageClock CyclesBenchmark ProblemsGenetic OperatorsRestoration ProgramsFlow MapBoolean FunctionTruth TableBoolean AlgebraGenotype-Phenotype MapBoolean ExpressionNumber of Input VariablesProgram LengthOR OperationHalf AdderMultiple TermsApplying genetic parallel programming to synthesize combinational logic circuitsPeer Reviewed Journal Article10.1109/TEVC.2006.884044